The present invention relates to a semiconductor package and a method for manufacturing the same.
In these modern times, semiconductor chips that are capable of storing and processing huge amounts of data within relatively short periods of times and their corresponding semiconductor packages are in high demand.
Recently, in order to improve the data storage capacities and data processing speeds of a semiconductor package, stacked semiconductor packages, in which at least two semiconductor chips are stacked, have been disclosed in the art.
Conventional stacked semiconductor packages have their semiconductor chips electrically connected by conductive bonding wires. However, in the case where the semiconductor chips are electrically connected by the conductive bonding wires, due to differences in lengths of the conductive bonding wires, problems can arise that make it difficult to process data at a high speeds and at high volumes.
Lately, in order to cope with the problems of the conventional stacked semiconductor package, a technique of electrically connecting semiconductor chips using through-electrodes passing through semiconductor chips has been suggested.
Nevertheless, in the case where the semiconductor chips which are electrically connected using the through-electrodes unwanted current leakages can occur. Also, in order to prevent the occurrence of current leakage, it is necessary to form an insulation pattern through very complicated patterning processes including a deposition process, a photolithographic process, an etching process, a cleaning process, etc.